1. Field of the Invention
This invention relates to a monolithic semiconductor substrate embodying both digital and analog circuits and, more particularly, to an apparatus and method for reducing noise transferred from digital circuits to analog circuits without limiting digital circuit performance.
2. Description of the Relevant Art
Integrated circuits which embody both analog and digital circuitry on the same monolithic substrate are well known. Examples of such integrated circuits include audio acquisition and/or transmission products. Audio acquisition includes any device which receives and records an audio waveform, and which samples and quantizes that waveform according to discrete time intervals. Audio transmission may include digital audio reproduction--i.e., demodulation and digital processing circuits necessary to manipulate digital information.
Audio acquisition can be accomplished using various types of modulation schemes, such as pulse code modulation, delta-sigma modulation, etc. Regardless of the modulation scheme used, proper audio recording requires the incoming analog signal be sampled at a frequency of at least twice the incoming audio frequency to achieve error-free sampling. Sampling less than the aforesaid minimum causes aliasing problems. During each sample interim, quantization is used to preserve corresponding amplitude information. While sampling records time slices, quantization records amplitude information within each time slice. The combination of sampling and quantization for a given modulation technique thereby completely preserves the audio signal in digital form. Accordingly, audio acquisition must employ analog circuitry useful in sampling (e.g., sample-and-hold circuits) and quantization (e.g., clocked comparator circuits).
Once an analog audio signal is sampled and converted to digital format, the resulting digital signal can thereafter be forwarded back as an analog signal using various audio reproduction techniques. Generally speaking, audio reproduction includes, for example, demodulation circuits, reproduction processing circuits, demultiplexers, digital-to-analog converters, output sample-and-hold circuits, etc. Accordingly, digital audio reproduction is necessary to present back, possibly in digitally processed form, the analog signal previously recorded through analog acquisition.
Generally configured between circuits which perform digital audio acquisition and circuits which perform digital audio reproduction is a digital signal processor (DSP). A DSP is used to manipulate digitally acquired binary numbers. The ease by which digital numbers can be manipulated by a DSP adds importance to reasons why it may be desirable to convert an analog audio signal to a digital audio signal, and why the manipulated data can thereafter be converted back to analog form. Once the analog audio signal is converted to digital, the DSP can easily perform rapid manipulation of that data. DSP operations are prevalent in the telecommunication industry, and are usually found in modems, vocoders and transmultiplexers, etc.
Examples of circuits used to convert an analog audio signal to a digital signal is an analog/digital ("A/D") converter. A digital-to-analog circuit is often referred to as a ("D/A") converter. Placing the DSP between the A/D and D/A converter allows manipulation of the digital information preferably in real time. There may be instances in which multiple A/D and D/A converters are present with multiple DSPs and possibly multiple microprocessors on a monolithic substrate. A clock manager may be used to clock the multiple digital and analog subsystems embodied upon the substrate.
An unfortunate aspect of digital circuitry is the noise created whenever a digital signal transitions between logic 0 and logic 1 values. If digital and analog circuits are to be used on the same monolithic substrate, steps must be taken to minimize transferal of digitally created noise to analog circuits during those transitory times. Steps must also be taken to maximize DSP performance. To maximize DSP performance, the digital circuits must be clocked at their highest allowable rate. The faster a DSP operates, the faster it can process operations. Most DSPs perform three basic operations: multiplication, addition, and delay. Those operations must be performed as quickly as possible since, in most instances, DSPs operations occur in real time. For example, digital processing of a sampled analog signal must be completed within that sampling period. Any technique therefore chosen to reduce transferal of noise must not deleteriously affect the speed at which the DSP or related digital circuitry operate.
The problems of digitally created noise imputed to the analog circuits is best explained in reference to the analog circuits and how they may be employed. FIG. 1 illustrates an example of an input stage of a typical modulator used, e.g., in a delta sigma A/D converter. Switches Q1 and Q2 are activated and deactivated in rapid succession to sample differential analog input signals+VIN and -VIN. The analog signals may be periodically sampled according to the timing diagram shown in FIG. 2. Switches Q1 are closed during times when "signal 1" (shown in FIG. 2) transitions to a logic high value. Likewise switches Q2 are closed during times when signal 2 of FIG. 2 transitions to a logic high value. More specifically, when signals 1 and 2 are high, respective switches Q1 and Q2 are closed, and once a switch is closed, the capacitors C1 and C2 shown in FIG. 1 charge or discharge to the appropriate value. Integrator, INT, performs analog noise-shaping, the output of which is forwarded to a quantizer (not shown).
A delta sigma A/D converter generally comprises a modulator and a digital decimation filter. The modulator samples the analog input at a high frequency and low resolution. The resulting quantization noise from the sampling event is shaped by the modulator so that its noise density is lowest over the frequency band of interest. For audio applications, typically the low frequencies are of interest so that quantization noise is shaped to be the lowest at low frequencies and greatest at high frequencies.
In a typical audio A/D, the digital decimation filter takes the noise shaped modulator output, low pass filters that output, and decimates it to the audio sample rate. The resolution of the decimation filter output is much greater than the modulator output, since the bandwidth is reduced and because the high frequency modulator noise has been low pass filtered.
The A/D converter therefore requests sampling of the analog input. Similar to an A/D converter, sampling is required in a D/A converter which employs an interpolation filter. An interpolation filter generally increases the sample rate, and the delta sigma (or sigma delta) modulator creates a one bit output stream which shapes the quantization noise output. The D/A switched capacitor converts the one bit output to a positive or negative reference (VREF) value, and low pass filters smoothes the discrete voltage steps from the switched capacitor circuit. Interpolation is generally performed in the DSP portion of the substrate, whereas the D/A switched capacitor and continuous time filters are in analog portions of the substrate.
The audio sampling rate (fs) is typically 44.1 kHz or 48 kHz. The analog modulator sampling rate (Fovr) is many times the audio sample rate. Typically, Fovr is 128 fs or 256 fs. For every one audio sample, the modulator samples 128 or 256 times. A plot of a typical delta sigma modulator operating at 128 fs is shown in FIG. 3.
A characteristic of sigma delta modulators which is typically not desirable, is tones which appear in the modulator output near Fovr/2. These tones are very far from the frequency band of interest, however, digital noise coupling into the modulator (i.e., A/D or D/A switched capacitor filter) at frequencies near Fovr/2 can mix with these tones to produce tones in the frequency band of interest.
An understanding of where these tones come from is best explained in reference to the output of a modulator employing a one bit quantizer. This one bit output represents a signal which switches between a positive reference voltage (i.e., "1") and a negative reference voltage (i.e., "0"). If the input to the modulator is at a DC level, then the average of these one bit samples is equal to the DC level applied to the input. For instance, if the input voltage is zero, the output bit stream will consist of an equal number of 1s and 0s. This could be a square wave with a frequency of Fovr/2. In this case, all the quantization noise is localized to a tone at Fovr/2.
In reality, the output of a modulator will not be an exact square wave for a DC level of zero on the input, however, it will have a significant amount of noise energy in a tone at or near Fovr/2. For time varying input signals, the frequency of this tone will vary slightly and multiple tones may appear at and around Fovr/2. Care must be taken to prevent these tones from mixing with any digital noise at Fovr/2 and shifting down to the baseband.
Digital noise on a mixed signal IC can couple into the analog circuitry in a variety of ways. A common means is through the substrate. Transistors or interconnect on an integrated circuit have some form of capacitive coupling to and from the monolithic substrate. Large amounts of digital circuits switching at high frequencies can capacitively couple a significant amount of energy into the substrate causing currents to flow and the voltage to vary. Since the substrate is common between the analog and the digital portions, this energy will couple into the analog circuitry and the analog signal path.
Noise from the substrate can couple into the analog signal path in a linear or non-linear fashion. If it couples linearly (i.e. the amount of coupling is independent of the analog signal level) then the coupling signal is seen directly in the analog signal. If it couples non-linearly (i.e., the amount of coupling is dependent on the analog signal level) the coupling signal will then mix with the analog signal. The sum and difference frequencies of the original analog signal and the coupling signal are seen on the resulting analog signal.
Linear coupling could occur between the substrate and the bottom plate of a poly--poly capacitor, while non-linear coupling could occur between the substrate and the source/drain of a transistor. The capacitance between the substrate and the bottom plate of a poly-poly capacitor does not vary significantly with the voltage difference. The capacitance between the substrate and the source or drain of a transistor, however, does vary with the voltage difference. This non-linearity causes the signal to modulate the other signal, the result of which is a sum and difference frequency in the output signal. The following equation illustrates this concept: EQU sin(w1*t)*sin(w2*t)=sin[(w1+w2)t]+sin[(w1-w2)t],
where w1 and w2 are the frequencies of the two analog signals.
As described earlier, delta sigma modulators produces tones near Fovr/2. If there is signal energy in the substrate from the digital circuit position with a frequency of Fovr/2, this will mix with the tones and produce difference frequencies in the baseband (0 to fs/2). In order to prevent this from happening, it is important to ensure that very little digital circuitry operates at Fovr/2.
It is common for digital circuitry in a mixed signal chip to operate at powers of two times the sample rate (fs). This is partially due to the ease of implementing dividers that divide a frequency by two. A divide by two can occur simply using a flip-flop.
Digital interfaces on commonly used A/D and D/A converters and DSPs operate with clock rates that are powers of two times the sample rate. The interpolation and decimation filters of sigma delta A/D and D/A converters typically operate at various power of two rates, such as 64 fs, 128 fs, etc. Circuitry operating at a particular rate couples noise into the substrate at that rate.
Software running in DSPs can produce digital noise in the substrate. Different instructions use different physical circuitry. For instance, a multiply instruction uses the multiply unit, while a move instruction does not. An operation that operates on the contents of register and stores the result back in a register does not use data memory, while memory-to-memory operations do. Typically, memory-to-memory operations and multiply instructions consume the most power, while move instructions and register-to-register operations consume less. The more power consumed, typically, the more noise is coupled into the substrate. Software programs on DSPs typically repeat at powers of two times the sample rate. This repeating produces digital noise in the substrate at that rate.
Converters or modulators which operate at powers of two times the sampling rate (i.e., 2.sup.N fs) receive noise, via the monolithic substrate, from processors or DSPs operating at 2.sup.N fs, where N is an integer value of 1, 2, 3, 4, etc. Noise imputed across the substrate from the digital circuits to the analog modulator typically affect the switched capacitors of the modulator. It is commonly known that when switched capacitor circuits are integrated on the same IC with a significant amount of digital circuitry, the switches need to be turned off at a time when the digital circuitry is quiet. Traditionally, this has been done by clocking the digital and analog circuitry at the same frequency, but with the digital clock delayed relative to the analog clock. The digital switching occurs shortly after the switches are closed and the digital noise from the switching settles prior to the next sample event as shown in FIG. 4.
Switch capacitor circuits require two non-overlapping clocks derived from the analog clock of FIG. 4 to control the switches. Exemplary switches within a switched capacitor network of a conventional modulator are shown in FIG. 1, and non-overlapping clocks are shown in FIG. 2.
In other implementations, the digital clock frequency is higher than the analog clock frequency, however, the digital clock is still delayed relative to the analog clock. This implementation allows the digital circuitry to be clocked faster, which can be advantageous, at the cost of reduced quiet time. FIG. 5 illustrates a digital clock transitioning at twice the speed of the analog clock.
It is advantageous to increase the speed of the digital clock relative to the analog clock since the digital circuitry can typically operate at a much higher frequency than the analog circuitry. In the case of a DSP integrated with switch capacitor circuits operating on audio signals, the DSP can run at clock frequencies of 100 MHz and above. The switch capacitor circuits are typically clocked at a few MHz. To achieve maximum performance from the DSP, it is best to operate it with the fastest clock possible. By simply increasing the digital clock frequency as shown in the previous example, the quiet time immediately preceding each analog transition (i.e., sample) decreases to the point of significantly degrading performance of the analog modulator by providing more noise to switched capacitors.
The most sensitive time in which to avoid digital noise within the modulator is just before and during the time when the switches are closing. (i.e., the falling edges of the clocks which operate those switches). The implies that the DSP, microprocessor core logic, and various other digital circuits on the substrate can run at full speed during much of the time when the switches are closed. However, care must be taken to modify the digital clock so the digital circuit clocks are temporarily terminated at appropriate, crucial sampling times.